I'm a PhD graduate from the School of ECE in Purdue University, advised by Prof. T.N.Vijaykumar and Prof. Mithuna Thottethodi. I completed my PhD in June 2026 and will be joining the ChipStack team at Cadence in Summer 2026.

My research interests broadly lie in computer architecture. My PhD dissertation focused on formal verification of memory consistency in mordern processors and compilers.

During my masters' at IIT Madras, I worked on SHAKTIMAAN, a systolic-array based accelerator for DL inference. Earlier, I worked in the SHAKTI project in implementing cache-coherence protocol for multi-core processors.

Education

• PhD in Electrical & Computer Engineering (2021-June 2026)
  Purdue University
• B.Tech+M.Tech in Computer Science & Engineering (2015-2020)
  IIT Madras

Publications

QED: Scalable Consistency Verification of Memory Instruction Reordering in Hardware
Gokulan Ravi, Xiaokang Qiu, Mithuna Thottethodi, T. N. Vijaykumar
[paper] [video]